Power Optimization of Linear Feedback Shift Register Using Clock Gating
نویسنده
چکیده
A modified Linear Feedback Shift Register is designed in which power consumption reduction by deactivating the clock signal to Flip Flop when the output signal is same as input signal. The power consumption of the new LFSR is reduced due to the reduced switching of Flip Flop To verify, the maximum, minimum and average
منابع مشابه
A Design and Analysis of Low Power Linear Feedback Shift Register with Clock Gating
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